When performing an interface between semiconductor devices, in order to prevent reflection of signals, impedance matching is performed using a termination circuit that has a termination resistance. In this case, a termination circuit may be used that has a function for going ON or OFF depending on the need for termination resistance. An example of the construction of a termination circuit having the simplest ON/OFF function is shown in FIG. 6. In FIG. 6, the signal that is input to the input terminal 120 is supplied to the input circuit 108 and is terminated by the termination circuit 110. The termination circuit 110 comprises wiring-layer resistors 100, 102, and transistors TN100, TP100 that are respectively connected in a cascade arrangement to them. The transistors TN100, TP100 are turned ON or OFF by control signals BN1, BP1, respectively. However, in the circuit construction shown in FIG. 6, when there are differences in the wiring-layer resistors and ON resistance of the transistors due to manufacturing, it is not particularly possible to adjust the resistance value, so those differences due to manufacturing are reflected as are on the termination resistance value.
Therefore, in order to suppress differences in termination resistance due to manufacturing, circuit construction as shown in FIG. 7 is possible. In FIG. 7, the termination resistance is formed by a combination of wiring-layer resisters 100, 102 formed on the wiring layer, and the resistance of the transistor groups 121, 122 that are respectively connected in a cascade arrangement to them. Here, the transistor group 121 is constructed using transistors TN1 to TN4 that are connected in parallel as shown in FIG. 2. Transistors TN1 to TN4 are constructed so that the sources are common and connected to ground, the drains are common and connected to the wiring-layer resistor 100, and the gates supply control signals BN1 to BN4, respectively. The W sizes (channel widths) of the transistors TN1 to TN4 are different from each other, and by setting the level of the control signals BN1 to BN4 to high/low level, the transistor group 121 becomes a variable resistance unit.
The transistor group 122 is constructed using transistors TP1 to TP4 that are connected in parallel as shown in FIG. 3. Transistors TP1 to TP4 are constructed so that the sources are common and connected to a power supply VDD, the drains are common and connected to the wiring-layer resistor 102, and the gates supply control signals BP1 to BP4, respectively. The W sizes (channel widths) of the transistors TP1 to TP4 are different from each other, and by setting the level of the control signals BP1 to BP4 to high/low level, the transistor group 122 becomes a variable resistance unit.
In the example described above, four transistors are arranged, and the W sizes of the transistors are such that they are respectively double each other, such TN2 (TP2) is double TN1 (TP1), and TN3 (TP3) is double TN2 (TP2). With this kind of construction, it is possible to produce 24−1=15 different resistance values. By selecting the W sizes of the transistors after manufacturing while measuring the actual resistance values, it is possible to combine the resistance values.
The termination circuit shown in FIG. 7 can flexibly correspond to differences that occur in the construction of the transistors. For example, when the circuit is completed according to manufacturing standards, the variable values of resistance, or in other words, the W sizes of the transistors are set so that the seventh of fifteen different values is used. In this case, even when the transistor resistance per unit becomes two times higher than the manufacturing standard, by selecting the transistor with the largest variable value, or in other words, the largest W size, the ON resistance of the transistor can be made nearly the same as the set target value. On the other hand, when the transistor resistance per unit becomes less than the manufacturing standard, it is possible to make the ON resistance of the transistor correspond by selecting a transistor with a small W size.
It was explained above that for differences in transistors due to manufacturing, differences in transistor resistance up to 200% of the manufacturing standard pose no problem, however, actually, differences due to manufacturing also exist in the wiring-layer resistance. The method of how to set wiring-layer resistance and transistor resistance when differences of ±10% occur in wiring-layer resistance during the manufacturing process, will be explained below using concrete numerical values.
First, the case in which the target value of the termination resistance, or in other words, the sum of the wiring-layer resistance and transistor resistance is taken to be 300Ω will be considered. This value of 300Ω is a value defined by the specifications of the JEDEC (Joint Electron Device Engineering Council) standards for DDR (Double Data Rate) 2-type synchronous DRAM, and is normal as the value for termination resistance.
Equations are derived below that must be satisfied when setting each resistance value. Here, this will be explained for the wiring-layer resistance 100 and transistor group 121. The resistance value for the wiring-layer resistance 100 is taken to be r20, the resistance value for the transistor group 121 is taken to be r21, and the unit is taken to be Ω. It is possible to handle the wiring-layer resistance 102 and the transistor group 122 in the same way.
First, when considering just expanding the adjustment range, it is best that the minimum value r21(min) of the resistance value r21 be made as small as possible. However, since in actuality the W size of the transistor becomes large, the surface area of the elements of the element unit and input terminal capacitance are affected. When considering the example of the JEDEC standards for a DDR 2-type synchronous DRAM, the capacitance of the input/output terminals is limited to within 4.0 pF. Taking into consideration the limitations on the capacitance of the input/output terminals and the transistor performance, it is preferable that r21(min) be set within a range that will satisfy Equation (1) below.r21(min)≧25  Equation (1)
Also, the wiring-layer resistance must be set so that the total resistance when combined with the variable resistance of the transistor, even when the wiring resistance value is a maximum due to manufacturing differences, is 300Ω. By taking the standard manufacturing value of the resistance value r20 to be X0, it is necessary that Equation (2) be satisfied.X0×1.10+r21(min)≦300  Equation (2)
Another item that must be set is the ratio between the resistance value r21 and resistance value r20. Too large of a resistance ratio of the transistor section is unsuitable for actual specifications. Naturally, it is desirable that the termination resistance, including the voltage dependence and temperature dependence, be fixed. Here, the voltage dependence and temperature dependence of the resistance value of the wiring-layer resistance is generally small, so there is no problem. However, the voltage dependence and temperature dependence of the resistance due to the transistors is large. For example, considering the case of JEDEC standards for a DDR 2-type synchronous DRAM, for a product with voltage specifications of 1.8 V±0.1 V, and temperature specifications of 0 to 85° C., the transistor resistance value in this range fluctuates ±20% or more due to voltage and temperature. Therefore, when the ratio of the overall termination resistance that the transistor resistance occupies becomes large, a problem occurs in that the fluctuation in the overall termination resistance value occurs due to changes in voltage and temperature. Considering product specifications, it is preferable that the target value of the overall termination resistance be kept within ±5% even when dependence on voltage and temperature is taken into consideration. From these conditions it is necessary to satisfy Equations (3) and (4) below.r20+r21×1.2≦300×1.05  Equation (3)r20+r21×0.8≧300×0.95  Equation (4)
From Equations (3) and (4), it is necessary that r20 and r21 satisfy Equations (5) and (6).r21≦75  Equation (5)r20≧225  Equation (6)
Equation (6) must be satisfied even when the manufacturing range of the wiring-layer resistance becomes a minimum, so Equation (7) is obtained.X0×0.90≧225  Equation (7)
From Equations (1), (2) and (7), X0 must be set within the range of Equation (8) below.247.5≦X0≦250  Equation (8)
Also, r21 must be set so that it can be adjusted within the range of Equation (9) below.25≦r21≦75  Equation (9)
On the other hand, a semiconductor integrated circuit apparatus, having a unit similar to an adjustment unit for adjusting the aforementioned termination resistance, is disclosed in patent document 1. This semiconductor integrated circuit apparatus comprises a termination circuit that is located in an input circuit that receives input signals that are supplied from an external terminal and that comprises a plurality of MOSFETs that are connected in parallel to the aforementioned external terminal, and adjusts the resistance value of the termination resistance by adjusting the number of the plurality of MOSFETs to turn ON by a third control unit. This semiconductor integrated circuit apparatus has a termination circuit that includes a plurality of MOSFETS that are in parallel and resistance elements that are connected to them, so it is possible to easily construct a termination circuit that is matched to the signal-transmission path.
[Patent Document 1]
Japanese Patent Kokai Publicaton No. JP-P2004-327602A (FIG. 43)